Gordon Moore, in his seminal article in 1965, made a projection that the number of transistors on a chip will increase exponentially over the years. This projection is now known as Moore’s law. In the very same paper, he also listed anticipated challenges for sustaining such phenomenal growth in the level of integration. Those included excessive power dissipation and unmanageable design complexity/cost. More than 40 years later, Moore’s concerns have come true. Those are the key challenges that IC designers are facing today.
Our overall research objective is to address these challenges with unique mixed-signal system approaches. Our research efforts can be classified into the following three categories:
● Continue on the design of energy-efficient, high-performance digital I/O interfaces through mixed-signal architectures combining both strengths of analog and digital.
● Pioneer in the area of analog/mixed-signal design and verification methodologies to facilitate efficient design and reuse despite aggressive technology scaling.
● Explore new applications where mixed-signal approaches can benefit: for instance, nano/bio/medical sensor interfaces and power electronics.
Research Interests & Projects
Design of Energy-Efficient, High-Performance I/O Interfaces
● High-speed transceivers and serializer/deserializers
● Precise timing generation circuits (PLL/DLLs)
● Clock and data recovery loops (CDRs)
Design and Validation Methodologies for Analog and Mixed-Signal Systems
● Leveraging linear abstraction to simplify analog verification
● Intent-based design methodologies: circuit optimization, modeling, and coverage analysis
● Verifying if intent is realized properly: e.g. global convergence analysis
● Enabling robust design of mixed-signal "A+D" systems
● CircuitBook: a shared repository of analog circuit blocks
Exploring New Areas based on Our Expertise
● Systems traditionally designed based on ADC and DSP: sensor interfaces and smart power ICs
● Adopt the unique "A+D" systems in high-speed links to achieve high performance and low power
● Integrated mixed-domain systems: e.g. bio-sensors, power converters, silicon photonics, etc.
Journals & Patents
Sangho Youn and Jaeha Kim, "Markov Network Based Equivalence Checking in Mixed-Signal Systems," FAC, 2013.
Sangho Youn and Jaeha Kim, "Preventing Global Convergence Failure in Mixed-Signal Systems via Indeterminate State (‘X’) Elimination," TCAS-1, 2012.
Kyung Hoon Kim, Jaeha Kim, "Fault Coverage Analysis on Analog/Mixed-Signal Circuits Based on Statistical Dissimilarity," poster session in IEEE Int’ Test Conf., Nov 2012
Myeong-Jae Park and Jaeha Kim, "Pseudo-linear Analysis of Bang-bang Controlled Timing Circuits," TCAS-I.
Jihyun Ryoo, Seuk Son, and Jaeha Kim, "A 25–FO4, 81-mW Radix-64 Crossbar Switch with Partially-Activated Input and Output Lines," International SoC Design Conference 2012.
Seuk Son, Hanseok Kim, Myeong-Jae Park, Kyung Hoon Kim, and Jaeha Kim, "A 2.3-mW, 5-Gb/s Decision-Feedback Equalizing Receiver Front-End with Static-Power-Free Signal Summation and CDR-based Precursor ISI Reduction," IEEE Asian Solid-State Circuits Conference 2012.
Myeong-Jae Park, Hanseok Kim, Seuk Son and Jaeha Kim "A 5-Gbps 1.7pJ/bit Ditherless CDR with Optimal Phase Interval Detection," in IEEE Custom Integrated Circuits Conference, 2012.
Ji-Eun Jang, Myeong-Jae Park, Dongyun Lee and Jaeha Kim "True Event-Driven Simulation of Analog/Mixed-Signal Behaviors in System Verilog: A Decision-Feedback Equalizing (DFE) Receiver Example," in IEEE Custom Integrated Circuits Conference, 2012.
Seobin Jung, Yunju Choi, and Jaeha Kim, "Variability-Aware, Discrete Optimization for Analog Circuits," ACM/IEEE Design Automation Conference, June 2012.
Jaeha Kim, Sigang Ryu, Byoungjoo Yoo, Hanseok Kim, Yunju Choi, and Deog-Kyoon Jeong, "A Model-First Design and Verification Flow for Analog-Digital Convergence Systems: A High-Speed Receiver Example in Digital TVs", ISCAS 2012.
Yunju Choi, Seobin Jung, Jaeha Kim, "A 5-Bit, Constant Relative-Gain Digitally Controlled Oscillator for All-Digital, Adaptive-Bandwidth PLL/CDRs" 2012년, SoC Conference.
Sigang Ryu, Jaeha Kim "An Integration-Based, Spread-Spectrum-Clocking Tracking Aid for Digital Clock and Data Recovery Loops" Korea Conference on Semiconductors 2012.
Eunchul Kang and Jaeha Kim, "A Single-Stage Off-line LED Driver IC with Hysteric Power Factor Correction Control", Applied Power Electronics Conference and Exposition (APEC), Feb. 2012
K. Kim, J. Kim, "Investigations on the Use of Negative-Resistance Terminations for Multi-Drop Bus Channels," IEEE International Midwest Symposium on Circuits and Systems, Aug, 2011.
Myeong-Jae Park, Hanseok Kim, Minbok Lee, Jaeha Kim, "Fast and Accurate Event-Driven Simulation of Mixed-Signal Systems with Data Supplementation", Custom Integrated Circuits Conference, 2011.
Seobin Jung, Sangho Youn, Jaeha Kim, "Analysis on Performance Controllability under Process Variability: A Step Towards Grid-Based Analog Circuit Optimizers", Frontiers in Analog Circuit (FAC) Synthesis and Verification, 2011.
Sangho Youn, Jaeha Kim, Mark Horowitz, "Preventing Global Convergence Failures in Mixed-Signal Systems by Eliminating Indeterminate States", Frontiers in Analog Circuit (FAC) Synthesis and Verification, 2011.
Sangho Youn, Jaeha Kim, Mark Horowitz, "Global Convergence Analysis of Mixed-Signal Systems", Design Automation Conference, June 2011.
Eunchul Kang, Jaeha Kim, Dohwan Oh, Dongjin Min, "A 6.8-W Purely-Resistive AC Light-Emitting Diode Driver Circuit with 95% Power Factor", International Conference on Power Electronics, 2011.